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070907: Lam & Novellus both strip wafer edges
Ed’s Threads 070907
Musings by Ed Korczynski on September 7, 2007

Lam & Novellus both strip wafer edges
This is a tale of two companies, two machines, and two different ways to solve one related problem: wafers have edges. Silicon wafer edges perturb plasma flows in process chambers, and so induce inherent non-uniformities in processing. Silicon wafer edges are seemingly the main source of defects for immersion lithography. Advanced fabs today typically specify a 2mm edge exclusion for wafers, and Novellus and Lam have responded with new hardware to dry strip edges.

Novellus’ downstream dry edge strip. Depth-of-focus along with etch-rate selectivity challenges have led to the need for hardmasks in advanced IC lithography. The hardmask material must be properly chosen for selectivity to the underlying layer to be etched. In many cases, it can be an amorphous carbon PECVD thin-film that is “ashable” (a misnomer since it can be dry stripped without any ash-like residue remaining). A wide variety of hydrocarbon precursors may be used, and deposition parameters must be properly controlled to ensure the final film structure is composed of sp2 carbon-bonds for transparency and film stability. “We’re getting 20:1 selectivity, and extinction coefficient value at 633nm of 0.11,” claimed Julian Hsieh, senior director of product management for the dielectrics business group at Novellus Systems.

To eliminate any edge particles that could kill dice, the Vector Express PECVD tool from Novellus now provides a new dry edge-bead removal (EBR) capability into the outgoing loadlock (which SST recently reviewed). Using an off-the-shelf downstream plasma generator to crack O2 into mono-atomic oxygen (Fig.1), amorphous carbon (red in the figure) is stripped off the wafer edge while the top-surface is masked by center shield hardware.

Field-retrofittable to the Vector platform, the EBR has additional potential applications. Since mono-atomic oxygen is extremely reactive, it may be able to clean other PECVD films off of the edge/bevel of wafers. ”If you have this capability you may be able to use it to solve other problems,” admitted Hsieh.

In addition to clean wafer edges, it’s essential that deposited film properties remain constant all the way to the 2mm edge exclusion. Ensuring a uniform deposition environment across the wafer—in terms of temperature, plasma energy parameters, and precursor flows—requires careful optimization of chamber hardware. Consequently, Novellus modified the Vector Express chamber hardware to include new plasma confinement shields.

Lam’s plasma ring edge strip. Also using a physical shield, Lam Research Corp. now sells a plasma edge clean module that can be part of a cluster on the company’s 2300 hardware platform. A capacitively coupled plasma is shielded from the wafer topside by a shield precision engineered to float fractions of a millimeter above the wafer surface (a gap too small to be seen in Fig.2). No electrostatic chuck is used to minimize cost.

“If we as an industry had recognized the value of bevel clean, we would have done it earlier,” said Rick Gottscho, group VP and GM of Lam's etch business, noting that this market opening started with Korean memory customers. Yield improvements of 1%-4% are possible using rigorous dry edge strip, he said, adding that a 3-4 chamber cluster of these edge strippers may see production.

Lam quietly released this tool in 1Q07, and now claims to be engaged with 18 of the top 25 capital spenders. “Most of our customers today are in evaluation phases, looking at the yield benefits, and the applications first to use it, but the pull is very strong,” said Gottscho. He said that chamber throughputs are close to what you’d expect from a stripper dealing with low-k etch processes.

Both Novellus and Lam have released useful tools for high-volume production, and both use a hardware shield to protect wafer top-sides while stripping films from edges. However, they are inherently different in the plasma hardware. Novellus’ remote generator design is safe and simple and fits into a load-lock without taking up chamber space. Lam’s capacitively coupled plasma ring provides an additional degree of processing freedom with ion bombardment, but requires the space of a process chamber to do so.

Applications-specific hardware solutions such as these are just what the industry needs to maintain productivity while ramping the production of nanometer-node ICs. While the core technologies are not new, they have been combined in new ways based on direct feedback from end-users. The natural evolution of sophisticated hardware continues within the industry ecosystem.


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070907: Lam & Novellus both strip wafer edges

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Ed's Threads is the weekly web-log of SST Sr. Technical Editor Ed Korczynski's musings on the topics of semiconductor manufacturing technology and business. Ed received a degree in materials science and engineering from MIT in 1984, and after process development and integration work in fabs, he held applications, marketing, and business development roles at OEMs. Ed won editorial awards from ASBPE, including interviews with Gordon Moore and Jim Morgan, and is not lacking for opinions.