080317: There is no more noise...
Ed’s Threads 080317Musings by Ed Korczynski on March 17, 2008
There is no more noise...
There is only signal. In controlling the manufacturing processes used for advanced nano-scale IC, the aspects of metrology which we used to be able to ignore as “just noise” are now essential signal we must control. Where to draw the line, and how close is close are just some of the challenges in ensuring that data streams become productive information for fabs. Metrology sessions at SPIE this year
shone fractional wavelengths of light into the darkness of controlling accuracy
When IC features were greater than the wavelength of light used in photolithography—and likewise much greater than a countable number of physical atoms—there were many aspects of manufacturing which we could simply ignore. With the smallest IC feature, typically defined by the minimum half-pitch spacing between lines, now reaching ~45nm (which is less than one-quarter of the 193nm wavelength used in litho) we now experience “second-order” and “third-order” effects which must be controlled.
Vladimir Ukrainstev of Veeco Instruments co-led a panel discussion at SPIE 2008 on the need for CD-SEMs to be accurately calibrated with 3D-AFMs. Researchers have reportedly seen a mere 1° change in the sidewall angle of a device structure result in a 2nm change in the CD measured by a standard 2D SEM. With the allowable budget for CD variation shrunk down to 3nm-4nm, this sidewall angle dependence must be controlled. The greatest risk is in process drift in an etch chamber, where sidewall angle can change spacially (e.g., from the center to the edge of wafers) or temporally (from wafer to wafer over time), which can induce substantial error in the CD-SEM measurement.
With tight feedback loops in advanced fabs, erroneous CD-SEM data can be mistakenly used to set the wrong etch parameters for following lots, which can degrade yield. “Instead of changing CD etch time by the week, we’re changing by the lot or the wafer as part of APC,” explained Kevin Heidrich, Nanometrics’ senior director of new business development, in an exclusive interview with WaferNEWS
. Total CD control is ~4nm for all variability; a normal rule of thumb for precision over tolerance is 0.1, so the total budget for metrology is 0.4nm.
All measurement techniques are subject to some error, and even the best 3D-AFM is still subject to tip-wear and calibration. Veeco has been working with 3rd
-party specialists to optimize AFM tips for different applications, with great results reported for various shapes nano-machined from single-crystal silicon for strength and then coated with some manner of a carbon coating for wear-resistance. NIST showed SPIE attendees this year that even with a slow, expensive, and destructive technique like TEM, there is still 0.33nm (standard deviation, 1σ) of the sidewall angle uncertainty. Everything else adds up to 0.63nm of total uncertainty. Calibration is vital to minimize the propagation of uncertainties.
One of the issues in determining the side-wall angle is what portion of the sidewall to include in the analysis. For features with corner rounding, this could be challenging even with ideal 90 degree sidewalls. Just considering 2nm radii of curvature on the top corners of etched polysilicon lines of 32nm to 45nm widths, and ~10% of the linewidth varies with where a CD-SEM draws the line for the edge.
To help control APC in all manner of deposition and removal processes, Nanometrics recently announced the delivery of the company’s 1000th integrated metrology sub-system
; the milestone system was integrated into an advanced plasma etch system used to control gate CD in advanced logic devices.
At SPIE, IBM (Daniel Fischer et al.) showed OPC requirements for 32nm and the metrology tool calibrations need to support this advanced node. Modeling calibration sites per mask level has increased dramatically: normalized to the 90nm node, 65nm had 10×, and 32nm is 100×. There are now multiple CDs per contour, which results in a reduced number of measurement sites per wafer. For tool calibration, fundamental parameters of magnification, rotation, etc. each must be properly considered in modeling. The researchers showed that scanning a line array in orthogonal directions in a CD-SEM induced up to 2% variation in measurement due to the beam’s oval shape. It’s not noise anymore. “The users must understand the measurement techniques and have them constant or have a consistent offset to be able to use the data,” said Fischer. He added that with real device structures, 144nm was seen by a 2D tool while 160nm was measured by a 3D tool, so some manner of rigorous automated edge-detection is essential.
OCD looks very extendable to finFETs, too. SEMATECH and KLA-Tencor presented a paper on metrology for high-k
finFETs at SPIE. Using high-k
HfSiO thicknesses of 1.5nm and 3nm over Si3
, and using TiN as the metal gate, a thorough DOE of depositions over fins was done. Then using KLA-Tencor's next-generation spectroscopic ellipsometer
(measuring 225nm and up) for OCD, and CD-SEM from AMAT and also HR-TEM, cross-checks between the OCD and standard thin-film measurements showed that the offset was ~1nm. For the metal gate measurements, it was found that the TiN optical properties varied due to what is suspected to be some manner of slight oxide formation. Data from dense arrays showed serious offset from the pad areas, so correlations must be considered. Measuring in the fin area seems to provide sufficient resolution for process control for both the high-k and metal-gate depositions
. OCD measurement precision was at the 1% level or better, and in good agreement with reference measurements. OCD looks very promising for finFET gate stack characterization.n&k Technologies
has modified the optical path of their spectroscopic ellipsometer tool to add a pinhole lens which narrows the transmitted beam spot size from 400μm to 50μm. Since real-world ICs and photomasks tend to have designed areas with regular 50μm arrays, this opens up the ability to measure many more real structures. Collecting the reflectance and transmission in both s- and p-polarizations using 50μm spots provides four separate signals to be used in determining all the layer thicknesses on the mask, including quart etch dimensions for phase-shift masks.
In pushing the limits of signals, IBM and Hitachi recently announced a unique, two-year joint semiconductor metrology research agreement for 32-nm and beyond characterization and measurement of transistor variations
. Engineers from the two companies and Hitachi's subsidiary, Hitachi High-Technologies, will conduct joint research at IBM's Thomas J. Watson Research Center in Yorktown Heights, NY and at the College of Nanoscale Science and Engineering's Albany NanoTech Complex. Combining individual research strengths and IP will help "reduce the significant costs associated with research needed to advance the next generation of chip technology
," said Bernie Meyerson, VP of strategic alliances and CTO for IBM's systems & technology group, in a statement.Rudolph Technologies has become the first OEM to join SEMATECH's Metrology Program
headquartered at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. The initial program addresses a range of issues, including the metrology of thin films and metal gate stacks; wafer front, back, and edge macro defect inspection; and inspection and metrology for through silicon vias (TSV) and three-dimensional integrated circuits (3DIC).-- E.K.
Labels: accuracy, CD, fab, manufacturing, metrology, noise, SEM, semiconductor, SPIE
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080317: There is no more noise...
Ed’s Threads 070817Musings by Ed Korczynski on August 17, 2007FEI Phenom - SEM for the people
FEI has been supplying Scanning electron microscopes (SEM) to the semiconductor industry to help inspect ever smaller circuit-elements during the decades of the shrink. Now the miniaturization in electronics enabled by SEMs has been paired with miniaturized hardware to create a small revolution in microscopy. The company's new Phenom electron microscope, the size of a large coffee maker (Fig. 1) plus a small below-table vacuum pump, requires no external vibration isolation, can load a sample in <30 seconds, and costs <$80K.
Information is power, but it’s got to be “productive information” to be useful in production. Knowing what you’ve got is critical, so cost-effective metrology and inspection tools are essential for the operation of labs as well as fabs. SEMs provide essential information from R&D; to manufacturing quality control, but they are generally slow and sensitive instruments. It takes a skilled technician many minutes to load and focus samples in expensive tools, such that “SEM time” is a common bottleneck in R&D.;
The first SEM was developed in 1961 (Fig. 2). The electronics have shunk over the decades, and analysis capabilities such as energy-dispersive X-ray microanalysis have evolved, but the basic layout and size of the electron column and vacuum chamber have remained somewhat constant. Now FEI has shown that throwing out the old playbook and starting from scratch can produce a revolution in inspection tools.
Developed for broad ubiquitous applications in science and engineering after an “ah-ha” flash of insight a few years ago, the Phenom is the first commercial tool from FEI to take advantage of a real hardware miniaturization revolution.
By shrinking the electron column down so that it actually fits in the palm of your hand (Fig. 3),
and mating it to a miniscule vacuum-chamber and sample-holder cup (Fig. 4),
the combined small mass can be so rigidly coupled that it floats free from external vibrations.
At SEMICON West this year, the company showed a working unit on top of a cheap display table. I knocked on the sides of the unit and could see the tool’s outer skin vibrating while the image from the sample inside remained rock solid (Fig. 5).
The adjacent image was taken by me as the SEM operator after just three minutes of training. (Admittedly, I did learn to run traditional SEMs as an undergrad at MIT, but such prior training is really not needed with this tool.) FEI did a great job of developing a very easy to use GUI with touch-screen control for focus, magnification to 20,000x, contrast, etc.
Beyond picking up where optical microscopes are losing resolution power, the Phenom’s potential market will also include organizations that need SEM technology but cannot afford the typical >$200,000 investment for a traditional SEM system, plus the costs of additional personnel and facilities. At approximately one-third the price of a traditional SEM, this new tool should find broad acceptance in academia as well as industry. The Phenom is now available for purchase in Europe and North America, and sales to the rest of the world will be rolled out in 2008.
Finally, I've found the perfect tool to inspect my Shure VST-III stylus tip for wear. If only I could find someone who still knew what the stylus for a vinyl turntable was supposed to look like…
Labels: inspection, metrology, research, SEM
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070817: FEI Phenom - SEM for the people
Ed’s Threads 070720Musings by Ed Korczynski on July 20, 2007
HK+MG metrology technology
With High-k (HK) dielectrics and metal-gates (MG) now being ramped into CMOS production at Intel and IBM, much of the excitement at the just finished SEMICON West 2007 in San Francisco centered around manufacturing technologies needed for these new materials. ASM and Imago sponsored seminars on these topics, and much of the discussion in panel discussions sponsored by Praxair
centered on the challenges of working with these new materials. In particular, setting up affordable in-line metrology for these new ultra-thin materials will be tricky.
Recently departed SEMATECH Fellow Alain Diebold, now a Professor at the U. Albany
, provided an overview of the need for HK metrology in a breakfast seminar sponsored by Imago. For Hfx
Si1-xO2, both x=0.25 and 0.75 are stable structures, which may be regarded as Hf substituted in an SiO2 matrix and Si substituted in an HfO2 matrix, respectively. HK layers in production will likely be just 3-5 atomic layers thick. Since improving hole mobility is inherently difficult, one first possible application of finFETs is to integrate PMOS finFETs with planar nFETs at the beginning of the 32nm node. “We need atom-by-atom characterization and metrology for fins in R&D; today, not later,” informed Diebold.
The U. of North Texas—previously renowned for its jazz music scholarships—inherited an old TI fab and received $11M in funding to invest in cutting-edge metrology tools
. TEM can resolve sub-angstroms spatially, but chemical resolution is limited to ~1%. Secondary ion mass spectroscopy (SIMS) provides sub-parts-per-million chemical resolution, but lacks special resolution. Local-electrode atomic probe (LEAP) systems sold by Imago Scientific Instruments provide ~2Å spatial resolution and ~E18 chemical resolution, using full-width-half-maximum (WFHM) measurements of a calculated concentration curves to calculate thickness. Approximately 80nm diameter silicon samples are cut from wafers using a dual-beam FIB, and 6-7 samples can be prepared in an hour by a skilled FIB operator. Dopant “snow-plow” effects in diffusion, quantum well structures, and buried interface roughness can all be analyzed to calibrate in-line metrology techniques. LEAP reconstructions of this HK stack as-deposited and post-anneal show 0.5nm of Hf and O diffusion.
Since LEAP provides excellent resolution but is inherently destructive and relatively slow, it is ideal for R&D; but cannot be used for in-line production control. Still, LEAP and other lab techniques are vital for calibration of production control approaches. “The type of information that you get from R&D helps you set up your in-line metrology, and the two work hand-in-glove, as Howard Huff used to say,” reminded Diebold. With HKMG now ramping in production, there’s a crop of new in-line metrology tools available.
ReVera provides XPS tools that can resolve thickness, composition, profile, and chemical bonding states information from thin dielectric films
, and claims customers are using the tool to measure gate-dielectrics and HK storage for memory chips. XPS can measure all elements heavier than He for any film or material up to 100Å thick in any part of the process flow.
After one year of promoting it for high-volume metrology applications such as HK+MG
, Metryx claims sales have doubled for its mass monitoring tool, which has sufficient resolution to detect differences in the atomic masses between silicon (28 g/mole) and hafnium (178 g/mole) in hafnium-silicate ALD layers. The company claims wins with customers for process control applications in volume fabs, typically measuring the masses of >60 wafers/hr.
Metrosol’s vacuum ultra-violet (VUV) spectroscopic reflectometer was designed specifically to handle in-line metrology of ultra-thin dielectrics
. Two manually-loaded chambers have been in use for over two years at customers, one for hafnium-silicon-oxide films and one for nano-imprint lithography (NIL). The first five beta units of the fully-automated tool will be ready this September. The purchase cost is claimed to be 1/2 to 2/3 of an x-ray or extended range ellipsometer, and typical throughputs are 2x-10x of such systems. (Click for WaferNEWS' interview with CEO Kevin Fahey
Since thin-film metrology is pointless if you can’t deposit the material in the first place, the readiness of the industry to begin volume production of chips using HK gate-stacks has been shown by ASM officially releasing its Pulsar ALD chamber for the company’s Polygon cluster-tool
. ASM likes to term its ALD variant atomic-layer CVD (ALCVD), though the process and hardware seem quite similar to other single-wafer ALD technologies.
Gate-first HK stacks use a capping layer such as lanthanum-oxide to form a dielectric dipole in the vertical dimension. This cap oxide is hygroscopic, so the stack should be formed without breaking vacuum to eliminate exposure to water vapor. This is just one of the critical integration issues which must be controlled in the formation of HK+MG CMOS transistors. With atomically thin films and complex interdependencies in integration, the “make versus buy” decision for 2nd
-tier fabs will almost certainly fall to buying it, because it just cannot be easily made. “Even if you reverse-engineer the chip, you can’t discern the integration scheme,” explained Glen Wilk, product manager for transistor products at ASM.
Don’t worry if all of this sounds almost too difficult to manage. Professional materials scientists have been working on the research for decades, and we’re now in the era of engineering specific solutions to known problems. Stay tuned for yearly breakthroughs.
Labels: ALCVD, ALD, high-k, HK+MG, LEAP, manufacturing, metrology, XPS
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070720: HK+MG metrology technology